Field of the Disclosure
The present disclosure relates to a semiconductor device, and in particular relates to a semiconductor device having a dual work function metal gate and method for fabricating the same.
Description of the Related Art
In the course of the semiconductor integrated circuit (IC) evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the component (or line) that can be created using a fabrication process) has decreased.
Specifically, as the dimension of the complementary metal-oxide-semiconductor (CMOS) devices decreases, short channel effect is increased. Thus, the threshold voltage (Vth) of CMOS devices is undesirably reduced.
There are several methods to increase the threshold voltage (Vth), such as more channel doping, S/D doping reduction, increase halo implants, etc. However, the conventional methods have some drawbacks, for example, junction leakage is increased, drain current saturation (IDs) is increased, and junction capacitance is high.
Mid-gap materials having a work function of about 4.6 eV (such as TiN, Ta, W) (near the mid-gap of silicon) may be used as the gate. However, the undesirably gate-induced drain leakage (GIDL) still exists.
Therefore, there is a need to develop a semiconductor device having a high threshold voltage (Vth) and a low gate-induced drain leakage (GIDL).